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Nov 03, 2024
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USC Catalogue 2021-2022 [ARCHIVED CATALOGUE]
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EE 552 Asynchronous VLSI Design Units: 4 Terms Offered: Sp Asynchronous channels and architectures; implementation design styles; controller synthesis; hazards, and races; Petri-nets; performance analysis, and optimization; globally asynchronous, locally synchronous design. Prerequisite: EE 477L Recommended Preparation: EE 457 or other basic course in computer architecture Registration Restriction: Open only to graduate students Instruction Mode: Lecture, Discussion Grading Option: Letter
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