EE 552 Asynchronous VLSI Design

Units: 4
Terms Offered: Sp

Asynchronous channels and architectures; implementation design styles; controller synthesis; hazards, and races; Petri-nets; performance analysis, and optimization; globally asynchronous, locally synchronous design.
Prerequisite: EE 477L
Recommended Preparation: EE 457 or other basic course in computer architecture
Registration Restriction: Open only to graduate students
Instruction Mode: Lecture, Discussion
Grading Option: Letter