Nov 26, 2024  
USC Catalogue 2018-2019 
    
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USC Catalogue 2018-2019 [ARCHIVED CATALOGUE]

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EE 552 Asynchronous VLSI Design

Units: 3
Terms Offered: FaSp
Asynchronous channels and architectures; implementation design styles; controller synthesis; hazards, and races; Petri-nets; performance analysis, and optimization; globally asynchronous locally synchronous design.
Prerequisite: EE 477 .
Registration Restriction: Open only to graduate students.
Instruction Mode: Lecture, Discussion
Grading Option: Letter

Crosslisted as CSCI-552


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